Indium bump array fabrication on small CMOS circuit for flip-chip bonding

We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist...

Full description

Saved in:
Bibliographic Details
Published inJournal of semiconductors Vol. 32; no. 11; pp. 148 - 151
Main Author 黄寓洋 张宇翔 殷志珍 崔国新 刘惠春 边历峰 杨辉 张耀辉
Format Journal Article
LanguageEnglish
Published IOP Publishing 01.11.2011
Subjects
array
Arrays
Bonding
Chip formation
Chips
Circuits
CMOS
CMOS chips
CMOS circuits
CMOS integrated circuits
CMOS电路
Edge bead
Flip chip
Flip chip devices
Flip-chip bonding
GaAs/AlGaAs
Indium
indium bump
Indium bumps
Light modulators
Photoresists
Semiconductor quantum wells
Semiconductors
small-size
Spatial light modulators
Via hole
倒装芯片
光致抗蚀剂
制造
空间光调制器
芯片键合
铟凸点
阵列
Online AccessGet full text
ISSN1674-4926
DOI10.1088/1674-4926/32/11/115014

Cover

More Information
Summary:We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500 μm, which ensures the integrity of the indium bump array. 64 - 64 indium arrays with 20 μm-high, 30 μm-diameter bumps are successfully formed on a 5 - 6.5 mm^2 CMOS chip.
Bibliography:We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500 μm, which ensures the integrity of the indium bump array. 64 - 64 indium arrays with 20 μm-high, 30 μm-diameter bumps are successfully formed on a 5 - 6.5 mm^2 CMOS chip.
11-5781/TN
flip-chip bonding; indium bump; array; small-size
Huang Yuyang, Zhang Yuxiang, Yin Zhizhen, Cui Guoxin, Liu H C, Bian Lifeng, Yang Hui, Zhang Yaohui 1Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215125, China 2Institute for Microstructural Sciences, National Research Council, Ottawa K1A 0R6, Canada
ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:1674-4926
DOI:10.1088/1674-4926/32/11/115014