Junctionless Nanowire Transistor (JNT): Properties and design guidelines

• Published in: Solid-state electronics Vol. 65-66; pp. 33 - 37
• Main Authors: Colinge, J.P., Kranti, A., Yan, R., Lee, C.W., Ferain, I., Yu, R., Dehdashti Akhavan, N., Razavi, P.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Kidlington Elsevier Ltd 01.11.2011; Elsevier
• Subjects: Applied sciences; Channels; Compound structure devices; Devices; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Exact sciences and technology; Fin FET; Gates; Molecular electronics, nanoelectronics; MOSFET; Multigate FET; Nanocomposites; Nanomaterials; Nanostructure; Nanowire transistor; Nanowires; Semiconductor devices; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Transistors; MOSFET; Multigate FET; Fin FET; Nanowire transistor; Performance evaluation; Voltage threshold; Transistor gate; Doped materials; MOS structure; Inversion; Dual gate transistor; Nanoelectronics; Self aligned technology; Current control; Field effect transistor; Surface conductivity; Physical parameter; Junctionless transistor; Concentration effect; Capacitance; Silicon; Nanowires; Resistor; Electrical characteristic
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/j.sse.2011.06.004

Junctionless transistors are variable resistors controlled by a gate electrode. The silicon channel is a heavily doped nanowire that can be fully depleted to turn the device off. The electrical characteristics are identical to those of normal MOS-FETs, but the physics is quite different. Conduction mechanisms in Junctionless Nanowire Transistors (gated resistors) are compared to inversion-mode and accumulation-mode MOS devices. The junctionless device uses bulk conduction instead of surface channel conduction. The current drive is controlled by doping concentration and not by gate capacitance. The variation of threshold voltage with physical parameters and intrinsic device performance is analyzed. A scheme is proposed for the fabrication of the devices on bulk silicon.