Non-Volatile Photonic Memory Based on a SAHAS Configuration

• Published in: IEEE photonics journal Vol. 13; no. 2; pp. 1 - 8
• Main Authors: Olivares, Irene, Parra, Jorge, Sanchis, Pablo
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 01.04.2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Configurations; Energy consumption; Hafnium oxide; Insertion loss; Integrated circuits; integrated photonics; Logic gates; Memory devices; non-volatile; Nonvolatile memory; photonic memory; Photonics; plasma dispersion effect; Silicon; Silicon nitride; Silicon photonics; SONOS devices; Tunneling; Volatility; Writing
• ISSN: 1943-0655; 1943-0647
• DOI: 10.1109/JPHOT.2021.3060144

The non-volatile memory is a crucial functionality for a wide range of applications in photonic integrated circuits, however, it still poses a challenge in silicon photonic technology. This problem has been overcome in the microelectronic industry by using SONOS (silicon-oxide-nitride-oxide-silicon) memory cells, in which the non-volatility is enabled by a dielectric trapping layer such as silicon nitride. Analogously, in this work, a similar approach in which the nitride has been replaced by a hafnium oxide layer, named as SAHAS configuration, is proposed for enabling a programmable erasable photonic memory fully compatible with the silicon platform. The structure features an efficient performance with writing and erasing times of 100 µs, retention times over 10 years and energy consumption in the pJ range, which improve the current SONOS or floating gate based photonic approaches that exploit the plasma dispersion effect in silicon. The proposed non-volatile photonic memory device shows an extinction ratio above 12 dB and insertion losses below 1 dB in a compact footprint. In addition, because the memory is optically read, ultrafast access times in the picosecond range are also achieved.