Nanotechnology goals and challenges for electronic applications

Si metal-oxide-semiconductor field-effect transistor (MOSFET) scaling trends are presented along with a description of today's 0.13-/spl mu/m generation transistors. Some of the foreseen limits to future scaling include increased subthreshold leakage, increased gate oxide leakage, increased tra...

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Bibliographic Details
Published inIEEE transactions on nanotechnology Vol. 1; no. 1; pp. 56 - 62
Main Author Bohr, M.T.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.03.2002
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:Si metal-oxide-semiconductor field-effect transistor (MOSFET) scaling trends are presented along with a description of today's 0.13-/spl mu/m generation transistors. Some of the foreseen limits to future scaling include increased subthreshold leakage, increased gate oxide leakage, increased transistor parameter variability and interconnect density and performance. Basic device and circuit requirements for electronic logic and memory products are described. These requirements need to be kept in mind when evaluating nanotechnology options such as carbon nanotube field-effect transistors (FETs), nanowire FETs, single electron transistors and molecular devices as possible future replacements for Si MOSFETs.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:1536-125X
1941-0085
DOI:10.1109/TNANO.2002.1005426