Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric

A new adaptation strategy of I/O link equalizers is presented based on minimizing the bit error rate (BER) as the objective function to maximize the receiver voltage margin. The adaptation strategy is verified in a 90-nm test chip on both the transmitter finite-impulse response filter (Tx-FIR) and t...

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Published inIEEE journal of solid-state circuits Vol. 43; no. 9; pp. 2144 - 2156
Main Authors E-Hung Chen, Jihong Ren, Leibowitz, B., Hae-Chang Lee, Qi Lin, Kyung Oh, Lambrecht, F., Stojanovic, V., Zerbe, J., Yang, C.-K.K.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.09.2008
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:A new adaptation strategy of I/O link equalizers is presented based on minimizing the bit error rate (BER) as the objective function to maximize the receiver voltage margin. The adaptation strategy is verified in a 90-nm test chip on both the transmitter finite-impulse response filter (Tx-FIR) and the receiver decision-feedback equalizer (Rx-DFE). The performance is compared with the commonly used sign-sign least mean square (SS-LMS) adaptation and demonstrates significant improvements especially in the case of the Tx-FIR. This paper also demonstrates that in a highly attenuating system that contains both a Tx-FIR and Rx-DFE, using a Tx-FIR subject to peak output power constraint to compensate pre-cursor ISI is worse than solely using an Rx-DFE. The adaptation strategy is further applied to adapt the sampling phase of the clock-and-data recovery loop (CDR). The technique enables near-optimal BER performance by substantially reducing the pre-cursor ISI and requires almost no additional hardware compared to SS-LMS adaptation.
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ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2008.2001871