Electric-Field Enhancement of a Gate-All-Around Nanowire Thin-Film Transistor Memory
A high-performance gate-all-around (GAA) poly-Si nanowire (NW) SONOS-type memory thin-film transistor (TFT) is presented. The presence of the corners of the GAA structure resulted in the program speed and memory window of this device being superior to those of a planar poly-Si TFT device. When erasi...
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Published in | IEEE electron device letters Vol. 31; no. 3; pp. 216 - 218 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.03.2010
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | A high-performance gate-all-around (GAA) poly-Si nanowire (NW) SONOS-type memory thin-film transistor (TFT) is presented. The presence of the corners of the GAA structure resulted in the program speed and memory window of this device being superior to those of a planar poly-Si TFT device. When erasing, planar devices exhibit a threshold-voltage shift resulting from gate injection; the GAA device was immune to this behavior. The presence of a nonuniform electric field in the channel region during programming and erasing was confirmed through simulation. The device also exhibited superior endurance and data-retention behavior. |
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Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 content type line 23 ObjectType-Article-2 ObjectType-Feature-1 |
ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2009.2038177 |