Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier
Taking a velocity saturation effect and a carrier heating effect in the gradual channel region, complete thermal noise modeling of short-channel MOSFETs including the induced gate noise and its correlation coefficients is presented and verified extensively with experimentally measured data. All of t...
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Published in | IEEE journal of solid-state circuits Vol. 40; no. 3; pp. 726 - 735 |
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Main Authors | , , , , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.03.2005
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | Taking a velocity saturation effect and a carrier heating effect in the gradual channel region, complete thermal noise modeling of short-channel MOSFETs including the induced gate noise and its correlation coefficients is presented and verified extensively with experimentally measured data. All of the four noise models have excellently predicted experimental data with maximal error less than 10% for the deep-submicron MOSFETs. Using these models and a simultaneous matching technique for both optimal noise and power, a low noise CMOS amplifier optimized for 5.2-GHz operation has been designed and fabricated. Experiments using an external tuner show that both NF/sub 50/ and NF/sub min/ are very close to 1.1 dB, which is an excellent figure of merit among reported LNAs. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.2005.843637 |