Process and temperature compensation in a 7-MHz CMOS clock oscillator

• Published in: IEEE journal of solid-state circuits Vol. 41; no. 2; pp. 433 - 442
• Main Authors: Sundaresan, K., Allen, P.E., Ayazi, F.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.02.2006; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Circuit properties; Circuits; Clocks; CMOS; CMOS process; Compensation; Design. Technologies. Operation analysis. Testing; Electric potential; Electric, optical and optoelectronic circuits; Electronic circuits; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Exact sciences and technology; Fabrication; Frequency; Integrated circuits; Integrated circuits by function (including memories and processors); Oscillators; Oscillators, resonators, synthetizers; Power generation; Power supplies; Process compensation; Ring oscillators; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Standard deviation; Temperature compensation; Temperature distribution; Temperature sensors; Voltage; Voltage-controlled oscillators; Clock generator; Control circuit; Atomic clock; Microcontroller; Oscillation frequency; Differential circuit; Power supply; Compensating network; Voltage control; Adaptive method; Output stage; Process compensation; Ring oscillator; Thermal compensation; Electronic generator; Complementary MOS technology; Frequency standards; Standard deviation; temperature compensation; Comparator circuit; ring oscillators; Bias circuit
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2005.863149

This paper reports on the design and characterization of a process, temperature and supply compensation technique for a 7-MHz clock oscillator in a 0.25-/spl mu/m, two-poly five-metal (2P5M) CMOS process. Measurements made across a temperature range of -40/spl deg/C to 125/spl deg/C and 94 samples collected over four fabrication runs indicate a worst case combined variation of /spl plusmn/2.6% (with process, temperature and supply). No trimming was performed on any of these samples. The oscillation frequencies of 95% of the samples were found to fall within /spl plusmn/0.5% of the mean frequency and the standard deviation was 9.3 kHz. The variation of frequency with power supply was /spl plusmn/0.31% for a supply voltage range of 2.4-2.75 V. The clock generator is based on a three-stage differential ring oscillator. The variation of the frequency of the oscillator with temperature and process has been discussed and an adaptive biasing scheme incorporating a unique combination of a process corner sensing scheme and a temperature compensating network is developed. The biasing circuit changes the control voltage of the differential ring oscillator to maintain a constant frequency. A comparator included at the output stage ensures rail-to-rail swing. The oscillator is intended to serve as a start-up clock for micro-controller applications.