A High-Performance and Cost-Effective Field Programmable Gate Array-Based Motor Drive Emulator

• Published in: Micromachines (Basel) Vol. 14; no. 10; p. 1864
• Main Authors: Hernandez, Julio, Rangel-Magdaleno, Jose de Jesus, Morales-Caporal, Roberto
• Format: Journal Article
• Language: English
• Published: Basel MDPI AG 28.09.2023; MDPI
• Subjects: Algorithms; Design; Digital integrated circuits; Digital signal processors; Economic aspects; Emulators; Failure detection; Fault tolerance; Field programmable gate arrays; Fourier transforms; FPGA; Hardware description languages; hardware emulator; Magnets, Permanent; motor-drive; Permanent magnets; PMSM; Roads & highways; Semiconductor industry; Software; Synchronous machines; United States
• ISSN: 2072-666X; 2072-666X
• DOI: 10.3390/mi14101864

This work presents a hardware-based digital emulator capable of digitally driving a permanent magnet synchronous machine electronic setup. The aim of this work is to present a high-performance, cost-effective, and portable complementary solution when new paradigms of electronic drive design are generated, such as machine early failure detection, fault-tolerant drive, and high-performance control strategy implementations. In order to achieve the high performance required by the digital emulator, the electronic drive models (permanent-magnet synchronous machine, voltage-source inverter, motor-control strategy) are digitally described in Verilog hardware description language and implemented on a field programmable gate array (FPGA) digital platform using two approaches: parallel and sequential methods. The results obtained show the effectiveness of the digital emulator design, and the resources used by the solution presented can be implemented on a low-cost digital platform that reveals a cost-effective operation of the solution presented.