Design and integration of novel SCR-based devices for ESD protection in CMOS/BiCMOS technologies

• Published in: IEEE transactions on electron devices Vol. 52; no. 12; pp. 2682 - 2689
• Main Authors: Salcedo, J.A., Liou, J.J., Bernier, J.C.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.12.2005; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Adjustable; Applied sciences; BiCMOS integrated circuits; CMOS; CMOS integrated circuits; Design. Technologies. Operation analysis. Testing; Devices; Electric potential; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Electrostatic discharge (ESD); Electrostatic discharges; Exact sciences and technology; high-holding low-voltage trigger silicon controlled rectifier (HH-LVTSCR); holding voltage; Integrated circuits; latchup; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Terminals; Thyristors; Volt-ampere characteristics; Voltage; voltage snapback; high-holding low- voltage trigger silicon controlled rectifier (HH-LVTSCR); Voltage current curve; Circuit design; Electrostatic discharge; Protective device; Controlled rectifier; Protection circuit; Voltage control; voltage snapback; Latchup; BiCMOS technology; Low voltage; Trigger; Silicon rectifier; High voltage; Interconnection; p type semiconductor; Complementary MOS technology; holding voltage; Integrated circuit; n type semiconductor; Electrostatic discharge (ESD); Comparative study
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2005.859662

Robust and novel devices called high-holding low-voltage trigger silicon controlled rectifiers (HH-LVTSCRs) for electrostatic discharge (ESD) protection of integrated circuits (ICs) are designed, fabricated and characterized. The S-type current-voltage (I-V) characteristics of the HH-LVTSCRs are adjustable to different operating conditions by changing the device dimensions and terminal interconnections. Comparison between complementary n- and p-type HH-LVTSCR devices shows that n-type devices perform better than p-type devices when a low holding voltage (V/sub H/) is allowed during the on-state of the ESD protection structure, but when a relatively high holding voltage is required, p-type devices perform better. Results further demonstrate that HH-LVTSCRs with a multiple-finger layout render high levels of ESD protection per unit area, applicable in the design of ICs with stringent ESD protection requirements of over 15 kV IEC.