Ultrathin strained-SOI by stress balance on compliant substrates and FET performance

Ultrathin, strained-silicon-on-insulator (s-SOI) structures without a residual silicon-germanium (SiGe) underlayer have been fabricated using stress balance of bi-layer structures on compliant borophosphorosilicate glass (BPSG). The bi-layer structure consisted of SiGe and silicon films, which were...

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Bibliographic Details
Published inIEEE transactions on electron devices Vol. 52; no. 10; pp. 2207 - 2214
Main Authors Haizhou Yin, Hobart, K.D., Peterson, R.L., Kub, F.J., Sturm, J.C.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.10.2005
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:Ultrathin, strained-silicon-on-insulator (s-SOI) structures without a residual silicon-germanium (SiGe) underlayer have been fabricated using stress balance of bi-layer structures on compliant borophosphorosilicate glass (BPSG). The bi-layer structure consisted of SiGe and silicon films, which were initially pseudomorphically grown on a silicon substrate and then transferred onto BPSG by a wafer bonding and SmartCut process. The viscous flow of the BPSG during a high-temperature anneal then allowed the SiGe/Si bi-layer to laterally coherently expand to reach stress balance, creating tensile strain in the silicon film. No dislocations are required for the process, making it a promising approach for achieving high-quality strained-silicon for device applications. To prevent the diffusion of boron and phosphorus into the silicon from the BPSG, a thin nitride film was inserted between the bi-layer and BPSG to act as a diffusion barrier, so that a lightly doped, sub-10-nm s-SOI layer (0.73% strain) was demonstrated. N-channel MOSFETs fabricated in a 25-nm silicon layer with 0.6% strain showed a mobility enhancement of 50%.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
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ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2005.856185