Hierarchical interface-based supervisory control-part II: parallel case

• Published in: IEEE transactions on automatic control Vol. 50; no. 9; pp. 1336 - 1348
• Main Authors: Leduc, R.J., Lawford, M., Wonham, W.M.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.09.2005; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Automata; Computational complexity; Computer aided software engineering; Computer science; control theory; systems; Control systems; Control theory. Systems; Discrete event systems; discrete-event systems (DESs); Exact sciences and technology; formal methods; Hierarchical systems; interfaces; Manufacturing; Master-slave; Modelling and identification; State estimation; Supervisory control; interfaces; Formal method; Automaton; Worst case method; Consistency; State space method; hierarchical systems; Computational complexity; Modeling; Hierarchized structure; discrete-event systems (DESs); Automata; Hierarchical control; formal methods; Hierarchical system; Interface; Supervision; Discrete event system
• ISSN: 0018-9286; 1558-2523
• DOI: 10.1109/TAC.2005.854612

In this paper, we present a hierarchical method that decomposes a discrete-event system (DES) into a high-level subsystem which communicates with n/spl ges/1 parallel low-level subsystems, through separate interfaces which restrict the interaction of the subsystems. It is a generalization of the serial case (n=1) described in Part I of this paper, where we define an interface and a set of interface consistency properties that can be used to verify if a DES is nonblocking and controllable. Each clause of the definition can be verified using a single subsystem; thus the complete system model never needs to be stored in memory, offering potentially significant savings in computational resources. We provide algorithms for verifying these new properties, and briefly discuss the computational complexity of the method. Finally, we present an application to a large manufacturing example with an estimated worst-case closed-loop state-space size of 2.9/spl times/10/sup 21/.