A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis
This paper describes a methodology for global on-chip interconnect modeling and analysis using frequency-dependent multiconductor transmission lines. The methodology allows designers to contain the complexity of series impedance computation by transforming the generic inductance and resistance extra...
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| Published in | IEEE transactions on advanced packaging Vol. 27; no. 1; pp. 71 - 78 |
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| Main Authors | , , , , |
| Format | Journal Article Conference Proceeding |
| Language | English |
| Published |
Piscataway, NY
IEEE
01.02.2004
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subjects | |
| Online Access | Get full text |
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| Abstract | This paper describes a methodology for global on-chip interconnect modeling and analysis using frequency-dependent multiconductor transmission lines. The methodology allows designers to contain the complexity of series impedance computation by transforming the generic inductance and resistance extraction problem into one of per-unit-length parameter extraction. This methodology has been embodied in a CAD tool that is now in production use by interconnect designers and complementary metal oxide semiconductor (CMOS) process technologists. |
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| AbstractList | This paper describes a methodology for global on-chip interconnect modeling and analysis using frequency-dependent multiconductor transmission lines. The methodology allows designers to contain the complexity of series impedance computation by transforming the generic inductance and resistance extraction problem into one of per-unit-length parameter extraction. This methodology has been embodied in a CAD tool that is now in production use by interconnect designers and complementary metal oxide semiconductor (CMOS) process technologists. |
| Author | Elfadel, I.M. Deutsch, A. Rubin, B.J. Smith, H.H. Kopcsay, G.V. |
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| Cites_doi | 10.1109/iccad.2000.896465 10.1109/5.920582 10.1109/15.974624 10.1109/MWSYM.2002.1011792 10.1145/378239.378500 10.1109/TVLSI.2002.801574 10.1109/ICCAD.1995.479989 10.1109/EPEP.1993.394596 10.1109/43.838992 10.1109/EPEP.2002.1057950 10.1109/TCT.1973.1083755 10.1109/EPEP.2003.1250056 10.1145/277044.277132 10.1109/DAC.2002.1012592 10.1109/EPEP.2000.895553 10.1109/EPEP.2002.1057948 10.1147/rd.165.0470 10.1147/rd.236.0652 10.1109/43.931029 10.1145/378239.379023 |
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| Keywords | Frequency dependence Circuit design frequency-dependent multiconductor transmission lines Multiconductor line Modeling Parameter extraction Inductance CMOS on-chip interconnect modeling Transmission line CAD tool Interconnection Complementary MOS technology Integrated circuit Impedance Computer aided design |
| Language | English |
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| SubjectTerms | Applied sciences CMOS CMOS process CMOS technology Design automation Design methodology Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Extraction Frequency Impedance Inductance Integrated circuits Mathematical models Metal oxide semiconductors Methodology Multiconductor transmission lines Parameter extraction Production Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transmission lines |
| Title | A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis |
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