RF Transconductor Linearization Robust to Process, Voltage and Temperature Variations

• Published in: IEEE journal of solid-state circuits Vol. 50; no. 11; pp. 2591 - 2602
• Main Authors: Kundur Subramaniyan, Harish, Klumperink, Eric A. M., Srinivasan, Venkatesh, Kiaei, Ali, Nauta, Bram
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.11.2015; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Batteries; Circuits; CMOS; CMOS integrated circuits; cognitive radio receiver; Distortion; Electric potential; figure-of-merit; IIP3; Inverters; Linearity; Linearization; MOSFET; multi-band receiver; negative feedback; process voltage temperature (PVT) variations; receiver; Receivers; reconfigurable receiver; robust circuit design; SAW-less receiver; software-defined radio; software-defined receiver; transconductor; Volt-ampere characteristics; Voltage; wideband receiver
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2015.2453964

Software-defined radio receivers increasingly exploit linear RF V-I conversion, instead of RF voltage gain, to improve interference robustness. Unfortunately, the linearity of CMOS inverters, which are often used to implement V-I conversion, is highly sensitive to Process, Voltage and Temperature variations. This paper proposes a more robust technique based on resistive degeneration. To mitigate third-order IM3 distortion induced by the quadratic MOSFET I-V characteristic, a new linearization technique is proposed which exploits a floating battery by-pass circuit and replica biasing to improve IIP3 in a robust way. This paper explains the concept and analyzes linearity improvement. To demonstrate operation, an LNTA with current domain mixer is implemented in a 45 nm CMOS process. Compared to a conventional inverter based LNTA with the same transconductance, it improves IIP3 from 2 dBm to a robust P IIP3 of 8 dBm at the cost of 67% increase in power consumption.