A novel real-time resource efficient implementation of Sobel operator-based edge detection on FPGA

• Published in: International journal of electronics Vol. 101; no. 12; pp. 1705 - 1715
• Main Authors: Singh, Sanjay, Saini, Anil K, Saini, Ravi, Mandal, A.S., Shekhar, Chandra, Vohra, Anil
• Format: Journal Article
• Language: English
• Published: Abingdon Taylor & Francis 02.12.2014; Taylor & Francis LLC
• Subjects: Algorithms; Architecture (computers); Boards; Edge detection; edge detection processor; Field programmable gate arrays; FPGA implementation; Integrated circuits; Microprocessors; Operators; Real time; real-time edge detection; Sobel operator; VLSI architecture
• ISSN: 0020-7217; 1362-3060
• DOI: 10.1080/00207217.2014.888782

A new resource efficient FPGA-based hardware architecture for real-time edge detection using Sobel operator for video surveillance applications has been proposed. The choice of Sobel operator is due to its property to counteract the noise sensitivity of the simple gradient operator. FPGA is chosen for this implementation due to its flexibility to provide the possibility to perform algorithmic changes in later stage of the system development and its capability to provide real-time performance, hard to achieve with general purpose processor or digital signal processor, while limiting the extensive design work, time and cost required for application specific integrated circuit. The proposed architecture uses single processing element for both horizontal and vertical gradient computation for Sobel operator and utilised approximately 38% less FPGA resources as compared to standard Sobel edge detection architecture while maintaining real-time frame rates for high definition videos (1920 × 1080 image sizes). The complete system is implemented on Xilinx ML510 (Virtex-5 FX130T) FPGA board.