Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge–Response pair acquisition using Built-In Self-Test before shipping

• Published in: Integration (Amsterdam) Vol. 71; pp. 144 - 153
• Main Authors: Ogasahara, Yasuhiro, Hori, Yohei, Katashita, Toshihiro, Iizuka, Tomoki, Awano, Hiromitsu, Ikeda, Makoto, Koike, Hanpei
• Format: Journal Article
• Language: English
• Published: Amsterdam Elsevier B.V 01.03.2020; Elsevier BV
• Subjects: Built in test; Built-in self-test; Circuits; Electric potential; Feedback control systems; Integrated circuit; Linear feedback shift registers; Machine learning; Physical unclonable function; Reproducibility; Self tests; Semiconductor; Shipping; Shipping industry; Signal generation; Silicon; Voltage; Waveform analysis; Built-in self-test; Physical unclonable function; Semiconductor; Integrated circuit; Machine learning
• ISSN: 0167-9260; 1872-7522
• DOI: 10.1016/j.vlsi.2019.12.002

We implemented pseudo-linear feedback shift-register-based physical unclonable functions (PL-PUFs) on silicon and analyzed their performances in terms of reproducibility, uniqueness, and resistance to machine-learning attacks. A PL-PUF is compact and high-throughput PUF, slightly oversensitive to voltage fluctuations. To overcome this drawback, we developed a capturing signal generation circuit that was tolerant to the reproducibility degradation caused by supply voltage changes. We also implemented a Built-In Self-Test (BIST) circuit with an irreversible destruction mechanism to enable exceedingly fast challenge–response pairs (CPRs) for the PUFs before shipping. After the CPRs were evaluated, the BIST circuit became invulnerable to exploitation by attackers. •PL-PUF is implemented on silicon and achieves sufficiently high performance.•BIST circuit with irreversible destruction mechanism is proposed.•Resistance of the PL-PUF against machine-learning attack is evaluated.