Heuristic Algorithm for a WIP Projection Problem at Finite Capacity in Semiconductor Manufacturing

In this paper, we propose a heuristic approach for fixing work-in-progress (WIP) projection issues in the semiconductor industry especially for high mix low volume facilities. The considered problem consists of estimating the start and end dates for each remaining process step of the production lots...

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Bibliographic Details
Published inIEEE transactions on semiconductor manufacturing Vol. 31; no. 1; pp. 62 - 75
Main Authors Mhiri, Emna, Mangione, Fabien, Jacomino, Mireille, Vialletelle, Philippe, Lepelletier, Guillaume
Format Journal Article
LanguageEnglish
Published New York IEEE 01.02.2018
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Institute of Electrical and Electronics Engineers
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Summary:In this paper, we propose a heuristic approach for fixing work-in-progress (WIP) projection issues in the semiconductor industry especially for high mix low volume facilities. The considered problem consists of estimating the start and end dates for each remaining process step of the production lots in the WIP and anticipating the fab loading taking into account the constraints of the maximum throughput of machines considered as capacity constraints and customer delivery commitments. The objective being to guarantee on-time delivery, we focus on minimizing the total weighted tardiness. We have formulated the problem into a mixed-integer programming and we have empirically shown its computational intractability. Due to the computational intractability using actual production data, a heuristic algorithm is proposed. It is an iterative finite capacity planning system that considers as inputs lots due dates and equipment capabilities and capacities. The performance of the heuristic is assessed using industrial instances. It turns out that it achieves targeted objectives with satisfactory results in terms of quality of the solution and computation time.
ISSN:0894-6507
1558-2345
DOI:10.1109/TSM.2018.2792312