Defect behaviors in n-channel power VDMOSFETs during HEFS and thermal post-HEFS annealing

• Published in: Applied surface science Vol. 252; no. 8; pp. 3023 - 3032
• Main Authors: RISTIC, Goran S, PEJOVIC, Momcilo M, JAKSIC, Aleksandar B
• Format: Journal Article
• Language: English
• Published: Amsterdam Elsevier B.V 15.02.2006; Elsevier Science
• Subjects: Annealing; Condensed matter: electronic structure, electrical, magnetic, and optical properties; Condensed matter: structure, mechanical and thermal properties; Cross-disciplinary physics: materials science; rheology; Exact sciences and technology; Fowler–Nordheim injection; High electric field stress; Interface traps; MOS transistor; Oxide trapped charge; Physics; Annealing; Fowler–Nordheim injection; 73.40.Qv; Oxide trapped charge; 78.40.Fy; 72.20.Ht; 72.20.Jv; Interface traps; MOS transistor; High electric field stress; Fowler-Nordheim injection; Stress distribution; Electric field effects; MOS transistors; High field; Thermal annealing; 72.20.Jv Oxide trapped charge
• ISSN: 0169-4332; 1873-5584
• DOI: 10.1016/j.apsusc.2005.05.005

The results of positive/negative Fowler–Nordheim high electric field stress and thermal post-high electric field stress annealing of commercial n-channel power VDMOSFETs have been presented. They have shown that gate bias sign has an influence on the fixed trap behavior during high electric field stress, but has no influence on any defect type behavior during thermal post-high electrical field stress annealing. In addition, slow switching traps have different behavior, but fast switching traps have the same behavior during thermal post-high electrical field stress annealing and thermal post-irradiation annealing.