Mismatch sensitivity of a simultaneously latched CMOS sense amplifier

• Published in: IEEE journal of solid-state circuits Vol. 26; no. 10; pp. 1413 - 1422
• Main Authors: Sarpeshkar, R., Wyatt, J.L., Lu, N.C., Gerber, P.D.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.10.1991; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Closed-form solution; Differential amplifiers; Electric, optical and optoelectronic circuits; Electronics; Exact sciences and technology; Fabrication; Latches; MOS devices; Parasitic capacitance; Random access memory; Signal restoration; Threshold voltage; Transconductance; Voltage threshold; Random access memory(RAM); Perturbation method; Sensitivity; Complementary MOS technology; Capacitance; Amplifier; Mismatching; Transconductance
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/4.90096

Derives a new formula for the sensitivity of a vertically matched CMOS sense amplifier, of the type used in dynamic-RAMs (DRAMs), to threshold voltage mismatch, parasitic capacitance mismatch, transconductance mismatch, and bit-line load capacitance mismatch. The formula yields insight into the DRAM sensing operation. The authors derive a sensitivity formula for this sensing scheme, using perturbation theory. The perturbation approach is rigorous: it avoids most approximations and ad-hoc assumptions, it introduces no free constants to be determined from simulations, and it yields an explicit closed-form solution. The formula agrees well with simulations. It is inherently slightly conservative and thus appropriate for use in design.< >