Robust Pixel Design Methodologies for a Vertical Avalanche Photodiode (VAPD)-Based CMOS Image Sensor

• Published in: Sensors (Basel, Switzerland) Vol. 24; no. 16; p. 5414
• Main Authors: Inoue, Akito, Torazawa, Naoki, Yamada, Shota, Sugiura, Yuki, Ishii, Motonori, Sakata, Yusuke, Kunikyo, Taiki, Tamaru, Masaki, Kasuga, Shigetaka, Yuasa, Yusuke, Kitajima, Hiromu, Koshida, Hiroshi, Kabe, Tatsuya, Usuda, Manabu, Takemoto, Masato, Nose, Yugo, Okino, Toru, Shirono, Takashi, Nakanishi, Kentaro, Hirose, Yutaka, Koyama, Shinzo, Mori, Mitsuyoshi, Sawada, Masayuki, Odagawa, Akihiro, Tanaka, Tsuyoshi
• Format: Journal Article
• Language: English
• Published: Switzerland MDPI AG 21.08.2024; MDPI
• Subjects: Cameras; CMOS image sensors (CISs); Electric fields; guard ring; robust pixel design; Sensors; single-photon avalanche diodes (SPADs); Temperature; time-of-flight sensors; Transistors; robust pixel design; guard ring; CMOS image sensors (CISs); single-photon avalanche diodes (SPADs); time-of-flight sensors
• ISSN: 1424-8220; 1424-8220
• DOI: 10.3390/s24165414

We present robust pixel design methodologies for a vertical avalanche photodiode-based CMOS image sensor, taking account of three critical practical factors: (i) “guard-ring-free” pixel isolation layout, (ii) device characteristics “insensitive” to applied voltage and temperature, and (iii) stable operation subject to intense light exposure. The “guard-ring-free” pixel design is established by resolving the tradeoff relationship between electric field concentration and pixel isolation. The effectiveness of the optimization strategy is validated both by simulation and experiment. To realize insensitivity to voltage and temperature variations, a global feedback resistor is shown to effectively suppress variations in device characteristics such as photon detection efficiency and dark count rate. An in-pixel overflow transistor is also introduced to enhance the resistance to strong illumination. The robustness of the fabricated VAPD-CIS is verified by characterization of 122 different chips and through a high-temperature and intense-light-illumination operation test with 5 chips, conducted at 125 °C for 1000 h subject to 940 nm light exposure equivalent to 10 kLux.