Formal verification of fault tolerance using theorem-proving techniques
A formal verification system based on the use of automated reasoning techniques is described to validate fault tolerance. An extended Petri net representation, called a flow net, is described together with the theorem-proving implementation of a rule-based system for manipulating system descriptions...
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Published in | IEEE transactions on computers Vol. 38; no. 3; pp. 366 - 376 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.03.1989
Institute of Electrical and Electronics Engineers |
Subjects | |
Online Access | Get full text |
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Summary: | A formal verification system based on the use of automated reasoning techniques is described to validate fault tolerance. An extended Petri net representation, called a flow net, is described together with the theorem-proving implementation of a rule-based system for manipulating system descriptions. Examples taken from the literature are used to illustrate the representation and the capabilities of the formal verification system under development.< > |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9340 1557-9956 |
DOI: | 10.1109/12.21123 |