Formal verification of fault tolerance using theorem-proving techniques

A formal verification system based on the use of automated reasoning techniques is described to validate fault tolerance. An extended Petri net representation, called a flow net, is described together with the theorem-proving implementation of a rule-based system for manipulating system descriptions...

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Bibliographic Details
Published inIEEE transactions on computers Vol. 38; no. 3; pp. 366 - 376
Main Authors Kljaich, J., Smith, B.T., Wojcik, A.S.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.03.1989
Institute of Electrical and Electronics Engineers
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Summary:A formal verification system based on the use of automated reasoning techniques is described to validate fault tolerance. An extended Petri net representation, called a flow net, is described together with the theorem-proving implementation of a rule-based system for manipulating system descriptions. Examples taken from the literature are used to illustrate the representation and the capabilities of the formal verification system under development.< >
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9340
1557-9956
DOI:10.1109/12.21123