Power and Reliability Management of SoCs

Today's embedded systems integrate multiple IP cores for processing, communication, and sensing on a single die as systems-on-chip (SoCs). Aggressive transistor scaling, decreased voltage margins and increased processor power and temperature have made reliability assessment a much more signific...

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Bibliographic Details
Published inIEEE transactions on very large scale integration (VLSI) systems Vol. 15; no. 4; pp. 391 - 403
Main Authors Rosing, T.S., Mihic, K., De Micheli, G.
Format Journal Article
LanguageEnglish
Published Piscataway, NJ IEEE 01.04.2007
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Applied sciences
Assessments
Constraint optimization
Design. Technologies. Operation analysis. Testing
Devices
Electronics
Embedded system
Energy consumption
Energy management
Error analysis
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
IP (Internet Protocol)
Management
Operating temperature
Optimal control
Optimization
Policies
power consumption
Power system interconnection
Power system management
Power system reliability
reliability management
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Temperature sensors
Transistors
Very large scale integration
Voltage
Die
Processor
Error rate
Transistor
System on a chip
Optimization
Low voltage
Embedded systems
reliability management
Intellectual property core
Power consumption
Interconnection
Optimal control
Optimal solution
Multiple system
Integrated circuit
Reliability
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Summary:Today's embedded systems integrate multiple IP cores for processing, communication, and sensing on a single die as systems-on-chip (SoCs). Aggressive transistor scaling, decreased voltage margins and increased processor power and temperature have made reliability assessment a much more significant issue. Although reliability of devices and interconnect has been broadly studied, in this work, we study a tradeoff between reliability and power consumption for component-based SoC designs. We specifically focus on hard error rates as they cause a device to permanently stop operating. We also present a joint reliability and power management optimization problem whose solution is an optimal management policy. When careful joint policy optimization is performed, we obtain a significant improvement in energy consumption (40%) in tandem with meeting a reliability constraint for all SoC operating temperatures
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ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2007.895245