Comprehensive study of 1-Bit full adder cells: review, performance comparison and scalability analysis

• Published in: SN applied sciences Vol. 3; no. 6; pp. 644 - 15
• Main Authors: Hasan, Mehedi, Siddique, Abdul Hasib, Mondol, Abdal Hoque, Hossain, Mainul, Zaman, Hasan U., Islam, Sharnali
• Format: Journal Article
• Language: English
• Published: Cham Springer International Publishing 01.06.2021; Springer Nature B.V; Springer
• Subjects: 1-bit adder; Adding circuits; Applied and Technical Physics; Arithmetic and logic units; Business metrics; Chemistry/Food Science; Circuit design; Circuits; Computation; Critical path; Design techniques; Designers; Earth Sciences; Engineering; Environment; Full adder; Hybrid adder; Hybrid logic; Materials Science; Mathematics; Performance evaluation; Review Paper; Ripple carry adder; Simulation; Single logic; Transistors; Full adder; Hybrid adder; Hybrid logic; Single logic; Ripple carry adder; 1-bit adder
• ISSN: 2523-3963; 2523-3971
• DOI: 10.1007/s42452-021-04640-2

Full Adder (FA) circuits are integral components in the design of Arithmetic Logic Units (ALUs) of modern computing systems. Recently, there have been massive research interests in this area due to the growing need for low-power and high-performance computing systems. Researchers have proposed a variety of FA cells with diverse design techniques, each having its pros and cons. As a result, a systematic method for performance comparison of FA cells using a common simulation platform has become necessary. In this work, we present an extensive study of FA cells. We have compared the performance of thirty-three (33) existing 1-bit FA cells. The drive powers of these FA cells have been compared by applying a variety of load conditions. In addition, the 1-bit FA cells have been extended to 32-bit structures to test their scalability and to investigate their performance in wide-word structures. We have determined that twenty-one (21) of the thirty-three (33) FA cells cannot operate in a 32-bit structure, even though some of them exhibit excellent performance as a 1-bit cell. The main finding of this research is that the single-bit performance parameters of FA cells should not be considered as the main basis for performance comparison. Any FA cell should be analyzed in a multi-bit structure to determine its practical effectiveness. Article Highlights Hybrid full adders offer better performance than single logic full adders Many existing full adder cells are not scalable Conventional Mirror CMOS full adder offers better performance than many recent full adders in wide adder structure