An auto-I/Q calibrated CMOS transceiver for 802.11g

• Published in: IEEE journal of solid-state circuits Vol. 40; no. 11; pp. 2187 - 2192
• Main Authors: Yong-Hsiang Hsieh, Wei-Yi Hu, Shin-Ming Lin, Chao-Liang Chen, Wen-Kai Li, Sao-Jie Chen, Chen, D.J.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.11.2005; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Auto calibration; Baseband; Calibration; Cascades; Circuit testing; CMOS; DC offset cancellation; Demodulation; Design. Technologies. Operation analysis. Testing; Electronics; Exact sciences and technology; Filters; Gain; gain mismatch; Hardware; Input-output equipment; Integrated circuits; Noise levels; OFDM modulation; phase mismatch; Radio frequency; Receiving; RF transceiver; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Switches; Transceivers; Tuning; Voltage; Noise figure; gain mismatch; Phase tuning; 802.11g; Receiver; RF transceiver; Mismatching; Transceiver; DC offset cancellation; User interface; Complementary MOS technology; Auto calibration; CMOS integrated circuits; phase mismatch; Cost lowering; Gain
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2005.857348

The CMOS transceiver IC exploits the superheterodyne architecture to implement a low-cost RF front-end with an auto-I/Q calibration function for IEEE 802.11g. The transceiver supports I/Q gain and phase mismatch auto tuning mechanisms at both the transmitting and receiving ends, which are able to reduce the phase mismatch to within 1/spl deg/ and gain mismatch to 0.1dB. Implemented in a 0.25 /spl mu/m CMOS process with 2.7 V supply voltage, the transceiver delivers a 5.1 dB receiver cascade noise figure, 7 dBm transmit, and a 1 dB compression point.