Characterization of GeSn materials for future Ge pMOSFETs source/drain stressors

In order to outperform current uniaxial compressively strained Silicon channel pMOSFET technology (with embedded SiGe source/drain), switching to strained Ge channel is mandatory. GeSn materials, having larger lattice parameter than Ge, are proposed in this article as embedded source/drain stressors...

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Bibliographic Details
Published inMicroelectronic engineering Vol. 88; no. 4; pp. 342 - 346
Main Authors Vincent, B., Shimura, Y., Takeuchi, S., Nishimura, T., Eneman, G., Firrincieli, A., Demeulemeester, J., Vantomme, A., Clarysse, T., Nakatsuka, O., Zaima, S., Dekoster, J., Caymax, M., Loo, R.
Format Journal Article Conference Proceeding
LanguageEnglish
Published Amsterdam Elsevier B.V 01.04.2011
Elsevier
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Summary:In order to outperform current uniaxial compressively strained Silicon channel pMOSFET technology (with embedded SiGe source/drain), switching to strained Ge channel is mandatory. GeSn materials, having larger lattice parameter than Ge, are proposed in this article as embedded source/drain stressors for Ge channels. Our simulation results indicate that a minimum of 5% Sn is required in the GeSn source/drain to build a competitive strained Ge pMOSFETs with respect to strained Si channels. Therefore the compatibility of GeSn (with 2–8% Sn) materials with source/drain engineering processes (B implantation and activation and NiGeSn formation) has been studied. A low thermal budget has been determined for those processes on GeSn alloys: temperatures must be lower than 600 °C for B activation and lower than 450 °C for NiGeSn formation.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
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content type line 23
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2010.10.025