A multilevel nano-scale interconnection RLC delay model

• Published in: Chinese physics B Vol. 19; no. 7; pp. 563 - 569
• Main Author: 朱樟明 修利平 杨银堂
• Format: Journal Article
• Language: English
• Published: IOP Publishing 01.07.2010
• Subjects: CMOS; Delay; Interconnection; Mathematical models; Multilevel; Nanocomposites; Nanomaterials; Nanostructure; RLC; 互连延迟; 多层次; 延迟模型; 温度分布模型; 纳米级; 自加热效应; 计算机辅助设计
• ISSN: 1674-1056; 2058-3834
• DOI: 10.1088/1674-1056/19/7/077802

Based on the multilevel interconnections temperature distribution model and the RLC interconnection delay model of the integrate circuit, this paper proposes a multilevel nano-scale interconnection RLC delay model with the method of numerical analysis, the proposed analytical model has summed up the influence of the configuration of multilevel interconnections, the via heat transfer and self-heating effect on the interconnection delay, which is closer to the actual situation. Delay simulation results show that the proposed model has high precision within 5% errors for global interconnections based on the 65 nm CMOS interconnection and material parameter, which can be applied in nanometer CMOS system chip computer-aided design.