The Experimental Demonstration of a SASP-Based Full Software Radio Receiver

• Published in: IEEE journal of solid-state circuits Vol. 45; no. 5; pp. 979 - 988
• Main Authors: Rivet, Francois, Deval, Yann, Begueret, Jean-Baptiste, Dallet, Dominique, Cathelin, Philippe, Belot, Didier
• Format: Journal Article Conference Proceeding
• Language: English
• Published: New York, NY IEEE 01.05.2010; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Analog signal processing; Applied sciences; Buildings; Channels; CMOS technology; cognitive radio; Communication standards; Computer architecture; Design. Technologies. Operation analysis. Testing; Electric potential; Electronics; Engineering Sciences; Exact sciences and technology; Filtering; Integrated circuits; Process design; Receivers; sampled analog signal processor; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Signal design; Signal processing; Software radio; Strontium; Terminals; Sampled signal; Fast Fourier transformation; Analog signal; Base band; sampled analog signal processor; Analog processing; Frequency shift; cognitive radio; software radio; Complementary MOS technology; Analog signal processing; Signal processing; Software; Radio receivers; Frequency filtering
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2010.2041402

Many technological bottlenecks prevent from realizing a software radio (SR) mobile terminal. The old way of building radio architectures is now over because a single handled terminal has to address various communication standards. This paper exposes a SR receiver: a sampled analog signal processor (SASP) is designed to perform downconversion and channel presorting. The idea is to process analog voltage samples in order to recover in baseband any RF signal emitted from 0 to 5 GHz. An analog fast Fourier transform achieves both frequency shifting and filtering. An experimental demonstrator of the SASP using 65 nm CMOS technology from STMicroelectronics is here presented and measured. It validates the concept of a new SR receiver with the design of a demonstrator which runs at 1.2 GHz consuming 389 mW.