Memory characteristics of a self-assembled monolayer of Pt nanoparticles as a charge trapping layer

A self-assembled monolayer of Pt nanoparticles (NPs) was studied as a charge trapping layer for non-volatile memory (NVM) applications. Pt NPs with a narrow size distribution (diameter ∼4 nm) were synthesized via an alcohol reduction method. The monolayer of these Pt NPs was immobilized on a SiO(2)...

Full description

Saved in:
Bibliographic Details
Published inNanotechnology Vol. 19; no. 30; pp. 305704 - 305704 (5)
Main Authors Choi, Hyejung, Choi, Byung-Sang, Kim, Tae-Wook, Jung, Seung-Jae, Chang, Man, Lee, Takhee, Hwang, Hyunsang
Format Journal Article
LanguageEnglish
Published England IOP Publishing 30.07.2008
Online AccessGet full text

Cover

More Information
Summary:A self-assembled monolayer of Pt nanoparticles (NPs) was studied as a charge trapping layer for non-volatile memory (NVM) applications. Pt NPs with a narrow size distribution (diameter ∼4 nm) were synthesized via an alcohol reduction method. The monolayer of these Pt NPs was immobilized on a SiO(2) substrate using poly(4-vinylpyridine) (P4VP) as a surface modifier. A metal-oxide-semiconductor (MOS) type memory device with Pt NPs exhibits a relatively large memory window of 5.8 V under ± 7 V for program/erase voltage. These results indicate that the self-assembled Pt NPs can be utilized for NVM devices.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ObjectType-Article-1
ObjectType-Feature-2
ISSN:0957-4484
1361-6528
DOI:10.1088/0957-4484/19/30/305704