Automatic Hardware Reconfiguration for Current Reduction at Low Power in RFIC PAs

• Published in: IEEE transactions on microwave theory and techniques Vol. 59; no. 6; pp. 1560 - 1570
• Main Authors: Constantin, N G, Zampardi, P J, El-Gamal, M N
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.06.2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Amplifiers; Applied sciences; Circuit properties; Compensation; Design. Technologies. Operation analysis. Testing; Efficiency; Electric, optical and optoelectronic circuits; Electronic circuits; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; envelope feedback; Exact sciences and technology; GaAs; Gain; Gallium arsenide; Gallium arsenides; Hardware; HBT; Heterojunction bipolar transistors; Integrated circuits; Logic gates; power amplifiers (PAs); Power transmission; Radio frequency; reconfigurable; Reconfiguration; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Synchronism; Performance evaluation; Power transmission; Feedback regulation; Implementation; Junction transistors; reconfigurable; Feedback; Efficiency; power amplifiers (PAs); Reconfigurable architectures; Heterojunction bipolar transistors; HBT; envelope feedback; Automatic compensation; Power electronics; Calibration; Synchronization; Circuit complexity; GaAs; Bipolar transistor; Si junctions; Integrated circuit; Radiofrequency integrated circuits; Power amplifier; Low-power electronics; Gain
• ISSN: 0018-9480; 1557-9670
• DOI: 10.1109/TMTT.2011.2116038

This paper presents a novel hardware reconfiguration technique implemented in a dual integrated-circuit (IC) GaAs HBT power amplifier (PA) design and demonstrates reduced current and improved efficiency at low power. The method automatically reconfigures the hardware of an RF IC PA over a given power transmission. Hardware interfacing and synchronization from outside the PA is minimized, and automatic gain compensation upon hardware reconfiguration is achieved with minimal temperature-dependant calibration. The challenge of integrating such complex on-chip hardware functions in a GaAs HBT technology was circumvented by the introduction of a gating concept used in conjunction with envelope feedback, and careful tradeoffs between circuit complexity and performance. Designs that suit the on-chip integration of the technique in GaAs HBT or Si bipolar junction transistor technologies are described. Experimental data are reported to support the proposed method.