A Current-Transient Methodology for Trap Analysis for GaN High Electron Mobility Transistors

• Published in: IEEE transactions on electron devices Vol. 58; no. 1; pp. 132 - 140
• Main Authors: Jungwoo Joh, del Alamo, J A
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.01.2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Buffers; Charge carrier processes; Current measurement; Dynamic tests; Electronics; Exact sciences and technology; Gallium nitride; Gallium nitrides; GaN; HEMTs; High electron mobility transistors; high-electron mobility transistors (HEMTs); measurement; Methodology; MODFETs; Semiconductor devices; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Temperature measurement; transient; Transient analysis; Transistors; Trapping; Uniqueness; Ternary compound; Performance evaluation; Binary compound; Barrier layer; Electric stress; Aluminium nitride; Durability; trapping; Gallium nitride; III-V compound; measurement; High electron mobility transistor; GaN; transient; high-electron mobility transistors (HEMTs); Electric current measurement; Measurement method; Reliability; Time constant
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2010.2087339

Trapping is one of the most deleterious effects that limit performance and reliability in GaN HEMTs. In this paper, we present a methodology to study trapping characteristics in GaN HEMTs that is based on current-transient measurements. Its uniqueness is that it is amenable to integration with electrical stress experiments in long-term reliability studies. We present the details of the measurement and analysis procedures. With this method, we have investigated the trapping and detrapping dynamics of GaN HEMTs. In particular, we examined layer location, energy level, and trapping/detrapping time constants of dominant traps. We have identified several traps inside the AlGaN barrier layer or at the surface close to the gate edge and in the GaN buffer.