A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver

• Published in: IEEE journal of solid-state circuits Vol. 44; no. 3; pp. 916 - 927
• Main Authors: Kyehyung Lee, Qingdong Meng, Sugimoto, T., Hamashita, K., Takasuka, K., Takeuchi, S., Un-Ku Moon, Temes, G.C.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.03.2009; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: 1f noise; Amplifiers; Applied sciences; Architecture; Channels; Circuit properties; Computer science; Delta-sigma DAC; Design. Technologies. Operation analysis. Testing; Digital; Digital filters; Drivers; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Filtering; Filtration; Frequency filters; headphone driver; Headphones; Integrated circuits; Low pass filters; low voltage; Noise levels; Noise reduction; Power supplies; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Signal convertors; Signal to noise ratio; switched R-DAC; Switches; Voltage; Operational amplifier; Prototype; Third order; Two channel system; Driver; DA converter; switched R-DAC; Switching; Low voltage; Sigma-delta modulation; Digital filter; Complementary MOS technology; Delta-sigma DAC; digital filters; headphone driver
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2008.2012362

A 0.8 V third-order multibit DeltaSigma DAC with headphone driver is described. It is the first sub-1 V audio DeltaSigma DAC with integrated on-chip headphone driver. The dual-channel operation in digital section was efficiently realized with a time-interleaved single-channel hardware and extra registers. Using novel DAC architecture suitable for low-voltage operation, the analog section requires only one opamp per channel for the D/A conversion, low-pass filtering, and driving the headphone. Two prototype ICs (separate digital and analog chips), implemented in a 0.35 mum CMOS process, achieved an 88 dB dynamic range, while consuming 2.6 mW from a 0.8 V supply.