A High-Speed and High-Responsivity Photodiode in Standard CMOS Technology
This work investigates a new silicon (Si) photodiode (PD) by standard complementary metal-oxide-semiconductor (CMOS) process. The basic structure of the proposed Si PD is formed by multiple p-n diodes with shallow trench isolation oxide in between p- and n-region from Taiwan Semiconductor Manufactur...
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Published in | IEEE photonics technology letters Vol. 19; no. 4; pp. 197 - 199 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
15.02.2007
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | This work investigates a new silicon (Si) photodiode (PD) by standard complementary metal-oxide-semiconductor (CMOS) process. The basic structure of the proposed Si PD is formed by multiple p-n diodes with shallow trench isolation oxide in between p- and n-region from Taiwan Semiconductor Manufacturing Company 0.18-mum CMOS technology. The proposed PD demonstrates a responsivity of 0.37 A/W at zero bias (lambda=823nm). At reverse bias (V R ) of 14.3 V, the fabricated PD exhibits a high responsivity of 0.74 A/W, a -3-dB electrical bandwidth of 1.6 GHz, and an eye diagram at 3.5 Gb/s |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 1041-1135 1941-0174 |
DOI: | 10.1109/LPT.2006.890055 |