Formation of Single Tiers of Bridging Silicon Nanowires for Transistor Applications Using Vapor-Liquid-Solid Growth from Short Silicon-on-Insulator Sidewalls

Single tiers of silicon nanowires that bridge the gap between the short sidewalls of silicon‐on‐insulator (SOI) source/drain pads are formed. The formation of a single tier of bridging nanowires is enabled by the attachment of a single tier of Au catalyst nanoparticles to short SOI sidewalls and the...

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Published inSmall (Weinheim an der Bergstrasse, Germany) Vol. 5; no. 21; pp. 2440 - 2444
Main Authors Nayfeh, Osama M., Antoniadis, Dimitri A., Boles, Steven, Ho, Charles, Thompson, Carl V.
Format Journal Article
LanguageEnglish
Published Weinheim WILEY-VCH Verlag 02.11.2009
WILEY‐VCH Verlag
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Summary:Single tiers of silicon nanowires that bridge the gap between the short sidewalls of silicon‐on‐insulator (SOI) source/drain pads are formed. The formation of a single tier of bridging nanowires is enabled by the attachment of a single tier of Au catalyst nanoparticles to short SOI sidewalls and the subsequent growth of epitaxial nanowires via the vapor–liquid–solid (VLS) process. The growth of unobstructed nanowire material occurs due to the attachment of catalyst nanoparticles on silicon surfaces and the removal of catalyst nanoparticles from the SOI‐buried oxide (BOX). Three‐terminal current–voltage measurements of the structure using the substrate as a planar backgate after VLS nanowire growth reveal transistor behaviour characteristics. Single tiers of silicon nanowires that bridge the gap between the short sidewalls of silicon‐on‐insulator (SOI) source/drain pads are formed (see image). The formation of a single tier of bridging nanowires is enabled by the attachment of a single tier of Au catalyst nanoparticles to short SOI sidewalls and the subsequent growth of epitaxial nanowires via the vaporliquidsolid process.
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ISSN:1613-6810
1613-6829
1613-6829
DOI:10.1002/smll.200900855