Base current relaxation transient in reverse emitter-base bias stressed silicon bipolar junction transistors
The base current relaxation transient following reverse emitter-base (EB) bias stress and its effect on time-to-failure (TTF) determination are examined in self-aligned and nonself-aligned silicon bipolar junction transistors (BJTs) with thermal and deposited base oxide. A quantitative model indicat...
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Published in | IEEE transactions on electron devices Vol. 44; no. 5; pp. 792 - 800 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
IEEE
01.05.1997
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Subjects | |
Online Access | Get full text |
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Summary: | The base current relaxation transient following reverse emitter-base (EB) bias stress and its effect on time-to-failure (TTF) determination are examined in self-aligned and nonself-aligned silicon bipolar junction transistors (BJTs) with thermal and deposited base oxide. A quantitative model indicates that the transient is due to a reduction of the stress-generated positive charge trapped in the oxide layer near the emitter-base junction due to holes tunneling from oxide hole traps to silicon band states or SiO/sub 2//Si interface traps. The neutral oxide hole traps may be quickly recharged through hole tunneling or hole injection into the oxide during further reverse-bias stress. A delay time of /spl sim/10/sup -3/ s was observed after the termination of stress before base current relaxation begins, which affects the extraction of the ac operation TTF from dc stress measurements. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/16.568041 |