High‐precision simulation technology for enhanced Loran signal simulators based on Lagrange farrow structure filter

In this study, a real‐time high accuracy signal simulation technique for an enhanced Loran (eLoran) signal simulator is proposed, which can be used to verify the performance of the eLoran receiver. The proposed method is based on a maximumly flat design of the low‐pass filter, and high simulation ac...

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Bibliographic Details
Published inIET radar, sonar & navigation Vol. 17; no. 2; pp. 326 - 336
Main Authors Ma, Hongyu, Yuan, Yanning, Li, Zheng, Liu, Jiangfan, Pu, Yurong, Du, Yongxing, Xi, Xiaoli
Format Journal Article
LanguageEnglish
Published Wiley 01.02.2023
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Summary:In this study, a real‐time high accuracy signal simulation technique for an enhanced Loran (eLoran) signal simulator is proposed, which can be used to verify the performance of the eLoran receiver. The proposed method is based on a maximumly flat design of the low‐pass filter, and high simulation accuracy can be obtained in the low‐frequency band. The simulator structure is based on the variable fractional delay Farrow structure, which can regenerate eLoran signals with high‐precision time of arrival (TOA) in real‐time based on discrete samples on a hardware platform. By comparison of existing methods and the true TOA data validation, the proposed method has high performance for low‐frequency narrow‐band eLoran signals and the proposed technology can apply to arbitrary TOA real‐time simulations. (1) A real‐time high accuracy signal simulation technique for an enhanced Loran (eLoran) signal simulator is proposed, which can be used to verify the performance of the eLoran receiver. (2) The proposed method is based on a maximumly flat design of the low‐pass filter, and high simulation accuracy can be obtained in the low‐frequency band. (3) The simulator structure is based on the variable fractional delay (VFD) Farrow structure, which can regenerate eLoran signals with high‐precision time of arrival (TOA) in real‐time based on discrete samples on a hardware platform.
ISSN:1751-8784
1751-8792
DOI:10.1049/rsn2.12343