Quasi 3-D Velocity Saturation Model for Multiple-Gate MOSFETs

This paper presents a quasi-3D velocity saturation model for a multiple-gate MOSFET based on a calculation of Gauss's equation. A new and compact velocity saturation region length is derived from a simple approximation of the electric field distribution in the pinchoff region. It is found that...

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Bibliographic Details
Published inIEEE transactions on electron devices Vol. 54; no. 5; pp. 1165 - 1170
Main Authors HAN, Jin-Woo, LEE, Choong-Ho, PARK, Donggun, CHOI, Yang-Kyu
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.05.2007
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:This paper presents a quasi-3D velocity saturation model for a multiple-gate MOSFET based on a calculation of Gauss's equation. A new and compact velocity saturation region length is derived from a simple approximation of the electric field distribution in the pinchoff region. It is found that the length of the velocity saturation region increases with the increment of gate length and fin width. This new model is used to derive an analytical expression of a substrate current for a trigate MOSFET. In order to improve the accuracy of the substrate current model, the newly derived substrate current model introduces a parasitic potential drop across a thin-extension region and a dimensionless fitting parameter. A body-tied trigate MOSFET is fabricated on a bulk wafer so that the substrate current could be measured by its body contact. The new substrate current model is then compared with measurement data for a trigate MOSFET, and good agreement is observed
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
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content type line 23
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2007.894595