Fundamental study of an electrostatic chuck for silicon wafer handling

• Published in: IEEE transactions on industry applications Vol. 38; no. 3; pp. 840 - 845
• Main Authors: Asano, K., Hatakeyama, F., Yatsuzuka, K.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.05.2002; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Contamination; Dielectric thin films; Electric potential; Electrodes; Electronics industry; Electrostatics; High voltages; Industry Applications Society; Power engineering and energy; Semiconductors; Silicon; Vacuum systems; Voltage; Wafers
• ISSN: 0093-9994; 1939-9367
• DOI: 10.1109/TIA.2002.1003438

Mechanical holding systems of a wafer might cause serious problems in the semiconductor industry. Electrostatic wafer handling might be one of the possible solutions for such problems. The authors have investigated an attractive force on a silicon wafer by using an electrostatic chuck which consists of interdigitated electrodes and a dielectric thin film. Electrostatic attractive force increases as the applied voltage increases, and with a thinner dielectric layer. With the narrower width and spacing of interdigitated electrodes, the stronger electrostatic force is obtained. When 1-mm width and spacing interdigitated electrodes and 50-/spl mu/m-thick polymer film are used, the strongest force obtained was about 17 N in the vertical direction at 3.5 kV, for a 4-in silicon wafer. When DC high voltage is used, some residual force remains, even after the applied voltage is removed. This was overcome by using variable-frequency AC high voltage.