Simulink Behavioral Modeling of a 10-bit Pipelined ADC
The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers t...
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| Published in | International journal of automation and computing Vol. 10; no. 2; pp. 134 - 142 |
|---|---|
| Main Authors | , , , |
| Format | Journal Article |
| Language | English |
| Published |
Berlin/Heidelberg
Springer-Verlag
01.04.2013
Springer Nature B.V |
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| Online Access | Get full text |
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| Abstract | The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters （ADCs）. All the necessary blocks of this specific simulation environment have been implemented using the popular Matlab simulink environment. The purpose of this paper is to present the behavioral models of these blocks taking into account most of the pipelined ADC non-idealities, such as sampling jitter, noise, and operational amplifier parameters （white noise, finite DC gain, finite bandwidth, slew rate, and saturation voltages）. Simulations, using a 10-bit pipelined ADC as a design example, show that in addition to the limits analysis and the electrical features extraction, designers can determine the specifications of the basic blocks in order to meet the given data converter requirements. |
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| AbstractList | The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters (ADCs). All the necessary blocks of this specific simulation environment have been implemented using the popular Matlab simulink environment. The purpose of this paper is to present the behavioral models of these blocks taking into account most of the pipelined ADC non-idealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite DC gain, finite bandwidth, slew rate, and saturation voltages). Simulations, using a 10-bit pipelined ADC as a design example, show that in addition to the limits analysis and the electrical features extraction, designers can determine the specifications of the basic blocks in order to meet the given data converter requirements.[PUBLICATION ABSTRACT] The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters (ADCs). All the necessary blocks of this specific simulation environment have been implemented using the popular Matlab simulink environment. The purpose of this paper is to present the behavioral models of these blocks taking into account most of the pipelined ADC non-idealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite DC gain, finite bandwidth, slew rate, and saturation voltages). Simulations, using a 10-bit pipelined ADC as a design example, show that in addition to the limits analysis and the electrical features extraction, designers can determine the specifications of the basic blocks in order to meet the given data converter requirements. The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters （ADCs）. All the necessary blocks of this specific simulation environment have been implemented using the popular Matlab simulink environment. The purpose of this paper is to present the behavioral models of these blocks taking into account most of the pipelined ADC non-idealities, such as sampling jitter, noise, and operational amplifier parameters （white noise, finite DC gain, finite bandwidth, slew rate, and saturation voltages）. Simulations, using a 10-bit pipelined ADC as a design example, show that in addition to the limits analysis and the electrical features extraction, designers can determine the specifications of the basic blocks in order to meet the given data converter requirements. |
| Author | Samir Barra Souhil Kouda Abdelghani Dendouga N. E. Bouguechal |
| AuthorAffiliation | Advanced Electronics Laboratory, Department of Electronics, University of Batna, Avenue Chahid Boukhlouf Mohamed El Hadi, 05000, Batna, Algeria Department of electronics, University of M′sila, M′sila, Algeria Center for Development of Advanced Technologies, Microelectronics and Nanotechnology Division, August 20 1956 City, BP 17, Baba Hassen, Algiers, Algeria |
| Author_xml | – sequence: 1 givenname: Samir surname: Barra fullname: Barra, Samir email: barrasamir@hotmail.com organization: Advanced Electronics Laboratory, Department of Electronics, University of Batna – sequence: 2 givenname: Souhil surname: Kouda fullname: Kouda, Souhil organization: Department of electronics, University of M'sila – sequence: 3 givenname: Abdelghani surname: Dendouga fullname: Dendouga, Abdelghani organization: Center for Development of Advanced Technologies – sequence: 4 givenname: N. E. surname: Bouguechal fullname: Bouguechal, N. E. organization: Advanced Electronics Laboratory, Department of Electronics, University of Batna |
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| Cites_doi | 10.1016/j.measurement.2008.03.015 10.1109/TCSI.2003.808892 10.1007/s10825-012-0409-8 10.1109/TVLSI.2010.2089543 10.1109/31.45719 10.1109/4.818927 10.1049/iet-cds.2008.0229 10.1109/TCSII.2010.2040307 10.1016/S0263-2241(01)00014-8 10.1002/cta.743 10.1142/S0218126612500855 10.1109/ACTEA.2009.5227844 10.1109/MSE.2009.5270826 10.1109/MIXDES.2006.1706641 |
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| Copyright | Science in China Press 2013 Institute of Automation, Chinese Academy of Sciences and Springer-Verlag Berlin Heidelberg 2013 Science in China Press 2013. |
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| Keywords | Behavioral modeling sample and hold (S/H) pipelined ADC analog to digital converters (ADCs) multiple digital to analog converter (MDAC) |
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| Notes | The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters （ADCs）. All the necessary blocks of this specific simulation environment have been implemented using the popular Matlab simulink environment. The purpose of this paper is to present the behavioral models of these blocks taking into account most of the pipelined ADC non-idealities, such as sampling jitter, noise, and operational amplifier parameters （white noise, finite DC gain, finite bandwidth, slew rate, and saturation voltages）. Simulations, using a 10-bit pipelined ADC as a design example, show that in addition to the limits analysis and the electrical features extraction, designers can determine the specifications of the basic blocks in order to meet the given data converter requirements. Behavioral modeling； analog to digital converters （ADCs）； pipelined ADC； multiple digital to analog converter （MDAC）； sample and hold （S/H） 11-5350/TP |
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| PublicationTitle | International journal of automation and computing |
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| References | CR4 Lin, Chang, Liu, Huang (CR2) 2010; 57 CR3 Acosta, PeralÍas, Rueda, Huertas (CR7) 2002; 31 CR8 Maloberti (CR16) 2007 CR9 Tsividis (CR14) 1999 CR15 Mancini, Rapuano, Dallet (CR6) 2009; 42 CR12 CR11 Malcovati, Brigati, Francesconi, Maloberti, Cusinato, Baschirotto (CR13) 2003; 50 Sin, Seng-Pan, Martins (CR1) 2010; 4 Eichenberger, Guggenbuhl (CR18) 1990; 37 Barra, Dendouga, Kouda, Bouguechal (CR19) 2013; 22 Ruiz-Amaya, Delgado-Restituto, Rodríguez-Vázquez (CR5) 2012; 40 Dendouga, Bouguechal, Kouda, Barra, Lakehal (CR20) 2012; 11 Lin, Chang, Kung, Ting, Huang (CR10) 2011; 19 Dai, Harjani (CR17) 2000; 35 706_CR8 J Ruiz-Amaya (706_CR5) 2012; 40 Y Tsividis (706_CR14) 1999 706_CR3 706_CR4 J F Lin (706_CR10) 2011; 19 706_CR9 L Dai (706_CR17) 2000; 35 S Barra (706_CR19) 2013; 22 P Malcovati (706_CR13) 2003; 50 F Maloberti (706_CR16) 2007 C Eichenberger (706_CR18) 1990; 37 706_CR12 706_CR11 E Mancini (706_CR6) 2009; 42 A J Acosta (706_CR7) 2002; 31 S W Sin (706_CR1) 2010; 4 A Dendouga (706_CR20) 2012; 11 706_CR15 J F Lin (706_CR2) 2010; 57 |
| References_xml | – volume: 42 start-page: 38 issue: 1 year: 2009 end-page: 43 ident: CR6 article-title: A distributed test system for pipelined ADCs publication-title: Measurement doi: 10.1016/j.measurement.2008.03.015 contributor: fullname: Dallet – volume: 50 start-page: 352 issue: 3 year: 2003 end-page: 364 ident: CR13 article-title: Behavioral modeling of switched- capacitor sigma-delta modulators publication-title: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications doi: 10.1109/TCSI.2003.808892 contributor: fullname: Baschirotto – ident: CR3 – ident: CR4 – ident: CR15 – volume: 11 start-page: 321 issue: 4 year: 2012 end-page: 329 ident: CR20 article-title: Contribution to the modeling of a non-ideal Sigma- delta modulator publication-title: Journal of Computational Electronics doi: 10.1007/s10825-012-0409-8 contributor: fullname: Lakehal – volume: 19 start-page: 2158 issue: 12 year: 2011 end-page: 2169 ident: CR10 article-title: Transition-code based linearity test method for pipelined ADCs with digital error correction publication-title: IEEE Transactions on Very Large Scale Integration Systems doi: 10.1109/TVLSI.2010.2089543 contributor: fullname: Huang – ident: CR12 – volume: 37 start-page: 256 issue: 2 year: 1990 end-page: 264 ident: CR18 article-title: On charge injection in analog MOS switches and dummy switch compensation techniques publication-title: IEEE Transactions on Circuits and Systems doi: 10.1109/31.45719 contributor: fullname: Guggenbuhl – volume: 35 start-page: 109 issue: 1 year: 2000 end-page: 113 ident: CR17 article-title: CMOS switched-op-amp-based sample-and-hold circuit publication-title: IEEE Journal of Solid-State Circuits doi: 10.1109/4.818927 contributor: fullname: Harjani – ident: CR11 – ident: CR9 – volume: 4 start-page: 1 issue: 1 year: 2010 end-page: 3 ident: CR1 article-title: 1. 2-V, 10-bit, 60-360 MS/s time-interleaved pipelined analog-to-digital converter in 0.18¼m CMOS with minimised supply headroom publication-title: IET Circuits Devices & Systems doi: 10.1049/iet-cds.2008.0229 contributor: fullname: Martins – volume: 57 start-page: 163 issue: 3 year: 2010 end-page: 167 ident: CR2 article-title: A 10bit 60-MS/s low-power pipelined ADC with split-capacitor CDS technique publication-title: IEEE Transactions on Circuits and Systems doi: 10.1109/TCSII.2010.2040307 contributor: fullname: Huang – ident: CR8 – volume: 31 start-page: 47 issue: 1 year: 2002 end-page: 60 ident: CR7 article-title: HDL behavioral modelling of pipeline analog to digital converters publication-title: Measurement doi: 10.1016/S0263-2241(01)00014-8 contributor: fullname: Huertas – volume: 40 start-page: 571 issue: 6 year: 2012 end-page: 594 ident: CR5 article-title: Behavioral modeling of pipeline ADC building blocks publication-title: International Journal of Circuit Theory and Applications doi: 10.1002/cta.743 contributor: fullname: Rodríguez-Vázquez – year: 1999 ident: CR14 publication-title: Operation and Modeling of the MOS Transistor contributor: fullname: Tsividis – volume: 22 start-page: 1250085 issue: 2 year: 2013 ident: CR19 article-title: Contribution to the analysis and modeling of the non-ideal effects of pipelined ADCs using MATLAB publication-title: Journal of Circuits Systems and Computers doi: 10.1142/S0218126612500855 contributor: fullname: Bouguechal – start-page: 22 year: 2007 end-page: 23 ident: CR16 publication-title: Data Converters contributor: fullname: Maloberti – volume: 11 start-page: 321 issue: 4 year: 2012 ident: 706_CR20 publication-title: Journal of Computational Electronics doi: 10.1007/s10825-012-0409-8 contributor: fullname: A Dendouga – volume: 19 start-page: 2158 issue: 12 year: 2011 ident: 706_CR10 publication-title: IEEE Transactions on Very Large Scale Integration Systems doi: 10.1109/TVLSI.2010.2089543 contributor: fullname: J F Lin – start-page: 22 volume-title: Data Converters year: 2007 ident: 706_CR16 contributor: fullname: F Maloberti – volume: 37 start-page: 256 issue: 2 year: 1990 ident: 706_CR18 publication-title: IEEE Transactions on Circuits and Systems doi: 10.1109/31.45719 contributor: fullname: C Eichenberger – volume: 35 start-page: 109 issue: 1 year: 2000 ident: 706_CR17 publication-title: IEEE Journal of Solid-State Circuits doi: 10.1109/4.818927 contributor: fullname: L Dai – ident: 706_CR4 doi: 10.1109/ACTEA.2009.5227844 – ident: 706_CR9 – ident: 706_CR12 doi: 10.1109/MSE.2009.5270826 – volume: 31 start-page: 47 issue: 1 year: 2002 ident: 706_CR7 publication-title: Measurement doi: 10.1016/S0263-2241(01)00014-8 contributor: fullname: A J Acosta – ident: 706_CR3 – ident: 706_CR15 – ident: 706_CR11 – volume: 42 start-page: 38 issue: 1 year: 2009 ident: 706_CR6 publication-title: Measurement doi: 10.1016/j.measurement.2008.03.015 contributor: fullname: E Mancini – ident: 706_CR8 doi: 10.1109/MIXDES.2006.1706641 – volume: 57 start-page: 163 issue: 3 year: 2010 ident: 706_CR2 publication-title: IEEE Transactions on Circuits and Systems doi: 10.1109/TCSII.2010.2040307 contributor: fullname: J F Lin – volume: 40 start-page: 571 issue: 6 year: 2012 ident: 706_CR5 publication-title: International Journal of Circuit Theory and Applications doi: 10.1002/cta.743 contributor: fullname: J Ruiz-Amaya – volume: 22 start-page: 1250085 issue: 2 year: 2013 ident: 706_CR19 publication-title: Journal of Circuits Systems and Computers doi: 10.1142/S0218126612500855 contributor: fullname: S Barra – volume: 4 start-page: 1 issue: 1 year: 2010 ident: 706_CR1 publication-title: IET Circuits Devices & Systems doi: 10.1049/iet-cds.2008.0229 contributor: fullname: S W Sin – volume: 50 start-page: 352 issue: 3 year: 2003 ident: 706_CR13 publication-title: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications doi: 10.1109/TCSI.2003.808892 contributor: fullname: P Malcovati – volume-title: Operation and Modeling of the MOS Transistor year: 1999 ident: 706_CR14 contributor: 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