Conduction Bottleneck in Silicon Nanochain Single Electron Transistors Operating at Room Temperature
Single electron transistors are fabricated on single Si nanochains, synthesised by thermal evaporation of SiO solid sources. The nanochains consist of one-dimensional arrays of ${\sim}10$ nm Si nanocrystals, separated by SiO 2 regions. At 300 K, strong Coulomb staircases are seen in the drain--sourc...
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| Published in | Japanese Journal of Applied Physics Vol. 51; no. 2; pp. 025202 - 025202-6 |
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| Main Authors | , , , , , , |
| Format | Journal Article |
| Language | English |
| Published |
The Japan Society of Applied Physics
01.02.2012
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| Online Access | Get full text |
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| Summary: | Single electron transistors are fabricated on single Si nanochains, synthesised by thermal evaporation of SiO solid sources. The nanochains consist of one-dimensional arrays of ${\sim}10$ nm Si nanocrystals, separated by SiO 2 regions. At 300 K, strong Coulomb staircases are seen in the drain--source current--voltage ($I_{\text{ds}}$--$V_{\text{ds}}$) characteristics, and single-electron oscillations are seen in the drain--source current--gate voltage ($I_{\text{ds}}$--$V_{\text{gs}}$) characteristics. From 300--20 K, a large increase in the Coulomb blockade region is observed. The characteristics are explained using single-electron Monte Carlo simulation, where an inhomogeneous multiple tunnel junction represents a nanochain. Any reduction in capacitance at a nanocrystal well within the nanochain creates a conduction "bottleneck", suppressing current at low voltage and improving the Coulomb staircase. The single-electron charging energy at such an island can be very high, ${\sim}20k_{\text{B}}T$ at 300 K. |
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| Bibliography: | (a) Scanning electron micrograph of a Si nanochain deposited on SiO 2 . (b) Transmission electron micrograph of Si nanochains dispersed on a copper grid. (c) Schematic diagram of the silicon nanochain SET. (d) Scanning electron micrograph of a Si nanochain SET. (a) $I_{\text{ds}}$--$V_{\text{ds}}$ characteristics of a nanochain SET at 300 K. The inset shows the data on a log--linear $|I_{\text{ds}}|$--$V_{\text{ds}}$ plot at $V_{\text{gs}}=0$. (b) Temperature dependence of the $I_{\text{ds}}$--$V_{\text{ds}}$ characteristics for the same device at $V_{\text{gs}}=0$. The inset shows the data at 20 K on a log--linear $|I_{\text{ds}}|$--$V_{\text{ds}}$ plot. (c) Arrhenius plot of the logarithm of conductance $G$ as a function of inverse temperature $1/T$. (d) Current oscillations in the $I_{\text{ds}}$--$V_{\text{gs}}$ characteristics of a second, similar nanochain device, at 300 K and $V_{\text{ds}} = 1$ V. (a) Multiple-tunnel junction model for an $N$ island Si nanochain, with tunnel junction capacitance $C$ and gate capacitance $C_{\text{g}}$. (b) Multiple-tunnel junction approximation using Two semi-infinite capacitive arrays $C_{\text{h}}$ at islands $k$. (c) Multiple-tunnel junction approximation using capacitive arrays $C_{\text{h}}$ at islands $k + 1$ and $k-1$. (d) Multiple-tunnel junction approximation looking from island 1. Single electron Monte Carlo simulations for an MTJ with $N = 8$. Curves offset from each other by 0.05 nA for clarity for (a)--(c). (a) Coulomb staircase $I_{\text{ds}}$--$V_{\text{ds}}$ characteristics at 300 K, for single $C_{\text{g}}$ removed at an island (b) Coulomb staircase $I_{\text{ds}}$--$V_{\text{ds}}$ characteristics from 300--4.2 K, for $C_{\text{g}}$ removed at the fourth island. (c) Coulomb staircase $I_{\text{ds}}$--$V_{\text{ds}}$ characteristics at 300 K, for $C_{\text{g}}$ removed at multiple islands. (d) Experimental (circles) and simulated (triangles) data at 300 K for a nanochain SET with eight islands. $I_{\text{ds}}$ is plotted using a log (main figure) and linear (inset) scale. |
| ISSN: | 0021-4922 1347-4065 |
| DOI: | 10.1143/JJAP.51.025202 |