RT-HIL Implementation of the Hybrid Synchrophasor and GOOSE-Based Passive Islanding Schemes

• Published in: IEEE transactions on power delivery Vol. 31; no. 3; pp. 1299 - 1309
• Main Authors: Almas, M. S., Vanfretti, L.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.06.2016; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Circuit breakers; Delays; Design analysis; Design engineering; Electric power distribution; Electric power systems; Electrical Engineering; Elektro- och systemteknik; Frequency measurement; Islanding; Logic; Mathematical analysis; Mathematical model; Messages; Performance assessment; Performance evaluation; Phasor measurement unit (PMU); Phasor measurement units; power system islanding; protection relays; Reactive power; real-time hardware-in-the-loop simulation (RT-HIL); synchrophasors
• ISSN: 0885-8977; 1937-4208; 1937-4208
• DOI: 10.1109/TPWRD.2015.2473669

Real-time hardware-in-the-loop performance assessment of three different passive islanding detection methods for local and wide-area synchrophasor measurements is carried out in this paper. Islanding detection algorithms are deployed within the phasor measurement unit (PMU) using logic equations. Tripping decisions are based on local and wide-area synchrophasors as computed by the PMU, and trips are generated using IEC 61850-8-1 generic object-oriented substation event messages. The performance assessment compares these islanding detection schemes for the nondetection zone and operation speed under different operating conditions. The testbench that is demonstrated is useful for a myriad of applications where simulation exercises in power system computer-aided design software provide no realistic insight into the practical design and implementation challenges. Finally, different communication latencies introduced due to the utilization of synchrophasors and IEC 61850-8-1 GOOSE messages are determined.