Simple and Robust Current Sensor Fault Detection and Compensation Method for 3-Phase Inverters
The present paper proposes a genuine, simple to implement, robust and reliable method for current sensors fault detection and compensation used for 3-phase inverters. Its functionality is based on an algorithm programed into a Field Programmable Gate Array (FPGA) as general controller. Usually, 3-ph...
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Published in | IEEE access Vol. 8; pp. 34820 - 34832 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
Piscataway
IEEE
2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | The present paper proposes a genuine, simple to implement, robust and reliable method for current sensors fault detection and compensation used for 3-phase inverters. Its functionality is based on an algorithm programed into a Field Programmable Gate Array (FPGA) as general controller. Usually, 3-phase inverters are controlled using field oriented control (FOC) which is generally triggered to sample the measured currents on the established switching frequency. As the latter is much smaller than the base clock of the FPGA, this allows hundreds of free time samples to perform other calculations in-between two FOC samplings. In this paper, a method that uses these free and unused time samples is presented. This method performs calculations for fault detection and compensation ensuring that at each new FOC sampling, this will receive the correct current data to reach continuous operation despite faults. The interleaving principle of the FOC with the fault detection method, as it will be proven in the paper, ensures high reliability of the complete controller diminishing the possibility of undesired or faulted readings to disturb the FOC's calculations. The fault detection philosophy is based on continuous comparison of the instantaneous measured currents (sensor's response) against reference values. The experimental results presented in the paper prove reliable operational performances of the method in both steady state and transient conditions. The added value of the paper consists in its genuine approach to handle the fault detection and compensation in-between two PWM ticks, ensuring that no faulted measurements can reach the control unit. This added value is based on functionality divided on several functions triggered by an internal generated clock synchronizing and handshaking their operations towards one goal: fault detection and compensation. |
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ISSN: | 2169-3536 2169-3536 |
DOI: | 10.1109/ACCESS.2020.2974769 |