Measurement of Power Dissipation Due to Parasitic Capacitances of Power MOSFETs

• Published in: IEEE access Vol. 8; pp. 187043 - 187051
• Main Authors: Jadli, Utkarsh, Mohd-Yasin, Faisal, Moghadam, Hamid Amini, Pande, Peyush, Nicholls, Jordan R., Dimitrijev, Sima
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 2020; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: <italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">COSS losses; Basic converters; Capacitance; Channel current; current diversion phenomenon; Current measurement; efficiency; Electronic systems; Measurement methods; MOSFET; MOSFETs; power losses; Power measurement; power MOSFET; Switches; Switching; Switching loss; switching losses; Voltage measurement
• ISSN: 2169-3536; 2169-3536
• DOI: 10.1109/ACCESS.2020.3030269

Analysis of the switching losses in a power MOSFET is crucial for the design of efficient power electronic systems. Currently, the state-of-the-art technique is based on measured drain current and drain-to-source voltage during the switching intervals. However, this technique does not separate the switching power due to the resistance of the MOSFET channel and due to the parasitic capacitances. In this paper, we propose a measurement method to extract the power dissipation due to the parasitic capacitances of a MOSFET, providing useful information for device selection and for the design of efficient power electronic systems. The proposed method is demonstrated on a basic boost converter. The proposed method shows that the existing method underestimates the turn-On losses by 41% and overestimates the turn-Off losses by 35%.