A Latency-Effective Pipelined Divider for Double-Precision Floating-Point Numbers

In this article, we propose an effective algorithm of pipelined dividers for double-precision floating-point numbers. This reduces the latency of the previous pipelined dividers without increasing the lookup table size. The experimental results show that the proposed divider reduces the overall late...

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Bibliographic Details
Published inIEEE access Vol. 8; pp. 165740 - 165747
Main Authors Yun, Juwon, Lee, Jinyoung, Chung, Woo-Nam, Kim, Cheong Ghil, Park, Woo-Chan
Format Journal Article
LanguageEnglish
Published Piscataway IEEE 2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Algorithms
Computer arithmetic
Dividers
division
Error analysis
Floating point arithmetic
floating-point
Hardware
lookup table
Lookup tables
Numbers
Pipelines
Signal processing algorithms
Table lookup
Taylor series
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Summary:In this article, we propose an effective algorithm of pipelined dividers for double-precision floating-point numbers. This reduces the latency of the previous pipelined dividers without increasing the lookup table size. The experimental results show that the proposed divider reduces the overall latency up to 16% compared to the previous divider.
ISSN:2169-3536
2169-3536
DOI:10.1109/ACCESS.2020.3022657