Reduced self-heating by strained silicon substrate engineering

• Published in: Applied surface science Vol. 254; no. 19; pp. 6182 - 6185
• Main Authors: O’Neill, A., Agaiby, R., Olsen, S., Yang, Y., Hellstrom, P.-E., Ostling, M., Oehme, M., Lyutovich, K., Kasper, E., Eneman, G., Verheyen, P., Loo, R., Claeys, C., Fiegna, C., Sangiorgi, E.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Amsterdam Elsevier B.V 30.07.2008; Elsevier Science
• Subjects: Condensed matter: electronic structure, electrical, magnetic, and optical properties; Condensed matter: structure, mechanical and thermal properties; Cross-disciplinary physics: materials science; rheology; Electrical engineering, electronics and photonics; Elektroteknik, elektronik och fotonik; Exact sciences and technology; MOSFET; Physics; Self heating; Strained silicon; TECHNOLOGY; TEKNIKVETENSKAP; MOSFET; Self heating; Strained silicon; Strained silicon,Self heating,MOSFET; Silicon; Strains
• ISSN: 0169-4332; 1873-5584; 1873-5584
• DOI: 10.1016/j.apsusc.2008.02.172

Substrate engineering innovations such as SOI and the use of Si/SiGe virtual substrates become necessary in order to maintain performance leverage of integrated circuits with continued scaling. The relevance of thermal effects in device design increases since the thermal conductivity of these new materials is poor. The electrical performance of devices fabricated on thin virtual substrates grown by two different techniques is presented. It is found that self-heating is reduced and that thermal resistance measurements agree with modelling predictions. The reduction in performance enhancement seen in many strained Si MOSFETs is found here to be largely due to self-heating effects, rather than parasitics or the loss of strain.