Investigation of Temperature Dependence, Device Scalability, and Modeling of Semifloating-Gate Transistor Memory Cell
A semifloating-gate transistor had been proposed and its memory function has been demonstrated recently. In this paper, we further investigate its temperature dependency, device scalability, and device modeling. The high-temperature behavior is studied by measuring its endurance, retention, and dist...
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Published in | IEEE transactions on electron devices Vol. 62; no. 4; pp. 1177 - 1183 |
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Main Authors | , , , , , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
IEEE
01.04.2015
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Subjects | |
Online Access | Get full text |
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Summary: | A semifloating-gate transistor had been proposed and its memory function has been demonstrated recently. In this paper, we further investigate its temperature dependency, device scalability, and device modeling. The high-temperature behavior is studied by measuring its endurance, retention, and disturbance immunity at 85 °C. The device scalability down to the 14-nm technology node is investigated by simulation. Its macrodevice model for circuit design is also developed. Finally, a memory array with the specific peripheral circuits is designed using the device model developed in this paper. |
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ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/TED.2015.2398457 |