InGaAs Junctionless FinFETs With Self-Aligned Ni-InGaAs S/D

• Published in: IEEE journal of the Electron Devices Society Vol. 6; pp. 856 - 860
• Main Authors: Chang, Po-Chun, Hsiao, Chih-Jen, Lumbantoruan, Franky Juanda, Wu, Chia-Hsun, Lin, Yen-Ku, Lin, Yueh-Chin, Sze, Simon M., Chang, Edward Yi
• Format: Journal Article
• Language: English
• Published: New York IEEE 2018; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Electron devices; FinFET; high-k dielectric; Indium gallium arsenides; InGaAs nMOSFETs; Junctionless (JL) transistor; Licenses; metal source/drain; Ni-InGaAs; Self alignment; Temperature dependence; Transconductance; Transistors; Zirconium
• ISSN: 2168-6734; 2168-6734
• DOI: 10.1109/JEDS.2018.2859811

In this paper, the InGaAs junctionless (JL) FinFET with notable electrical performance is demonstrated. The device with <inline-formula> <tex-math notation="LaTeX">W_{\mathrm{ fin}} </tex-math></inline-formula> down to 20 nm, EOT of 2.1 nm, and <inline-formula> <tex-math notation="LaTeX">L_{G} = 60 </tex-math></inline-formula> nm shows high <inline-formula> <tex-math notation="LaTeX">I_{\mathrm{ ON}} = 188~\mu \text{A}/\mu \text{m} </tex-math></inline-formula> at <inline-formula> <tex-math notation="LaTeX">V_{DD} = 0.5 </tex-math></inline-formula> V and <inline-formula> <tex-math notation="LaTeX">I_{\mathrm{ OFF}} = 100 </tex-math></inline-formula> nA/<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula>, <inline-formula> <tex-math notation="LaTeX">I_{\mathrm{ ON}}/I_{\mathrm{ OFF}} = 5 \times 10^{5} </tex-math></inline-formula>, DIBL = 106 mV/V and SS = 96 mV/dec. The device also exhibits a decent extrinsic transconductance (<inline-formula> <tex-math notation="LaTeX">G_{\mathrm{ m}} </tex-math></inline-formula>) of 1142 <inline-formula> <tex-math notation="LaTeX">\mu \text{S}/\mu \text{m} </tex-math></inline-formula> at <inline-formula> <tex-math notation="LaTeX">V_{\mathrm{ DS}} </tex-math></inline-formula> of 0.5 V. This high performance is attributed to the moderate doping concentration to ensure the channel carriers could be effectively depleted and the low <inline-formula> <tex-math notation="LaTeX">R_{\mathrm{ SD}} </tex-math></inline-formula> realized by self-aligned Ni-InGaAs alloy S/D. Furthermore, we also examine the temperature dependence of the main electrical parameters of the JL transistor.