Object-oriented domain specific compilers for programming FPGAs

• Published in: IEEE transactions on very large scale integration (VLSI) systems Vol. 9; no. 1; pp. 205 - 210
• Main Authors: Mencer, O., Platzner, M., Morf, M., Flynn, M.J.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.02.2001; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Acceleration; Circuits; Compilers; Design automation; Design engineering; Design methodology; Field programmable gate arrays; Hardware; Object oriented; Object oriented modeling; Object oriented programming; Program processors; Programming; Programming profession; Streams; Very large scale integration
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/92.920835

Simplifying the programming models is paramount to the success of reconfigurable computing with field programmable gate arrays (FPGAs). This paper presents a methodology to combine true object-oriented design of the compiler/CAD tool with an object-oriented hardware design methodology in C++. The resulting system provides all the benefits of object-oriented design to the compiler/CAD tool designer and to the hardware designer/programmer. The two examples for domain-specific compilers presented are BSAT and StReAm. Each domain-specific compiler is targeted at a very specific application domain, such as applications that accelerate Boolean satisfiability problems with BSAT, and applications which lend themselves for implementation as a stream architecture with StReAm. The key benefit of the presented domain specific compilers is a reduction of design time by orders of magnitude while keeping the optimal performance of hand-designed circuits.