APA (7th ed.) Citation

Ma, W. C., Huang, Y., Chen, P., Jhu, J., Chang, Y., & Chang, T. (2020). Impacts of Vertically Stacked Monolithic 3D-IC Process on Characteristics of Underlying Thin-Film Transistor. IEEE journal of the Electron Devices Society, 8, 724-730. https://doi.org/10.1109/JEDS.2020.3009350

Chicago Style (17th ed.) Citation

Ma, William Cheng-Yu, Yan-Jia Huang, Po-Jen Chen, Jhe-Wei Jhu, Yan-Shiuan Chang, and Ting-Hsuan Chang. "Impacts of Vertically Stacked Monolithic 3D-IC Process on Characteristics of Underlying Thin-Film Transistor." IEEE Journal of the Electron Devices Society 8 (2020): 724-730. https://doi.org/10.1109/JEDS.2020.3009350.

MLA (9th ed.) Citation

Ma, William Cheng-Yu, et al. "Impacts of Vertically Stacked Monolithic 3D-IC Process on Characteristics of Underlying Thin-Film Transistor." IEEE Journal of the Electron Devices Society, vol. 8, 2020, pp. 724-730, https://doi.org/10.1109/JEDS.2020.3009350.