Impact of Thermomechanical Stresses on Bumpless Chip in Stacked Wafer Structure

• Published in: Japanese Journal of Applied Physics Vol. 52; no. 5; pp. 05FE01 - 05FE01-5
• Main Authors: Mizushima, Yoriko, Kitada, Hideki, Uchibori, Chihiro J, Maeda, Nobuhide, Kodama, Shoichi, Kim, Youngsuk, Fujimoto, Koji, Yoshimi, Seiichi, Nakamura, Tomoji, Ohba, Takayuki
• Format: Journal Article
• Language: English
• Published: The Japan Society of Applied Physics 01.05.2013
• Subjects: Chips; Cracks; Formations; Mathematical analysis; Polymers; Resins; Silicon; Stresses
• ISSN: 0021-4922; 1347-4065
• DOI: 10.7567/JJAP.52.05FE01

Crack formation due to thermomechanical stresses generated by a dielectric polymer thicker than 20 μm and by that with high modulus during the bumpless chip-on-wafer (COW) process has been investigated. According to the stress simulation, thermal stresses increase with polymer thickness where the stress value ranges from 100 to 200 MPa for benzocyclobutene (BCB)-based resin. Thermal stresses in the hybrid structure using epoxy-based resin and BCB-based resin were calculated to be less than 100 MPa. Thus, the reduction of the thicknesses of the polymer as well as the Si chip was found to be effective in avoiding crack formation in the COW structure. Moreover, to investigate the crack driving force, the energy release rate (ERR) was calculated. The crack propagates toward the Si chip corner and the result is consistent with the experiment. On the COW structure, a thin Si chip and a low-modulus polymer expand the process window.