Analytical and simulation studies of failure modes in SRAMs using high electron mobility transistors

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 12; no. 12; pp. 1885 - 1896
• Main Authors: Mohan, S., Mazumder, P.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.12.1993; Institute of Electrical and Electronics Engineers
• Subjects: Analytical models; Applied sciences; Circuit faults; Circuit testing; Electronics; Exact sciences and technology; Failure analysis; Gallium arsenide; HEMTs; Integrated circuits; Integrated circuits by function (including memories and processors); Materials testing; MODFETs; Process design; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Binary compound; Theoretical study; Modeling; Static storage; Analytic representation; Gallium Arsenides; High electron mobility transistor; Random access memory(RAM); Failure analysis; Integrated circuit; Equivalent circuit; Numerical simulation; Computer aided design; Fault diagnostic
• ISSN: 0278-0070
• DOI: 10.1109/43.251152

Gallium arsenide memories, which are now beginning to be used commercially, are subject to certain unusual parametric faults, not normally seen in silicon or other memory devices. This paper studies the behavior of gallium arsenide high electron mobility transistor (HEMT) memories in the presence of material defects, processing errors and design errors to formulate efficient testing schemes. All defects and errors are mapped into equivalent circuit modifications and the resulting circuits are analyzed and simulated to observe the fault effects. Certain complex pattern-sensitive faults described in the testing literature are not observed at all, while certain other faults which have not been previously studied, are observed. It is shown that by slightly modifying and reordering existing test procedures, all faults in these RAMs can be tested.< >